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CMOS FET with P-well with P- type halo under drain and counterdoped N- halo under source region
CMOS FET with P-well with P- type halo under drain and counterdoped N- halo under source region
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机译:带有P阱的CMOS FET,其漏极下具有P型晕圈,而源区下具有反掺杂N型晕圈
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摘要
A semiconductor device is formed on a semiconductor substrate with an N-well and a P-well with source/drain sites in the N-well and in the P-well by the following steps. Form a gate oxide layer and a gate electrode layer patterned into a gate electrode stack with sidewalls over a substrate with N-well and P-well. Form N− LDS/LDD regions in the P-well. Form N− LDS/LDD regions in the P-well and P− lightly doped halo regions in the P-well below the source site and the drain site in the P-well. Form a counter doped halo region doped with N type dopant below the source region site in the P-well. Form spacers on the gate electrode sidewalls. Then, form lightly doped regions self-aligned with the gate electrode in the source/drain sites. Form N+ type doped source/drain regions deeper than the N− LDS/LDD regions in the P-well in the source/drain sites. Form P+ type doped source/drain regions deeper than the P− LDS/LDD regions in the N-well in the source/drain sites.
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