首页>
外国专利>
Method and apparatus for designing LSI layout, cell library for designing LSI layout and semiconductor integrated circuit
Method and apparatus for designing LSI layout, cell library for designing LSI layout and semiconductor integrated circuit
展开▼
机译:设计LSI布局的方法和装置,设计LSI布局的单元库和半导体集成电路
展开▼
页面导航
摘要
著录项
相似文献
摘要
Method and apparatus for suppressing change in wiring delay time resulting from cell interchange and thereby satisfying required specifications in a short period of time with certainty during LSI layout designing. Cells are arranged in parallel to each other and routed based on circuit designing information, thereby designing a block layout including a plurality of cell rows. A cell not satisfying the required specifications is extracted from the block layout, and a level of drivability required for the cell to satisfy the required specifications is calculated. The extracted cell in question is interchanged with a substitute cell. The substitute cell has equivalent logic, a required level of drivability and the same width and terminal position in the cell arrangement direction reaction a cell row as the counterparts of the cell in question and is provided in a stretchable cell library.
展开▼