首页> 外国专利> Semiconductor device having gate edges protected from charge gain/loss

Semiconductor device having gate edges protected from charge gain/loss

机译:具有栅极边缘免受电荷增益/损耗影响的半导体器件

摘要

A plurality of core gate stacks and periphery gates on the substrate, each core gate stack and periphery gate having at least one side and first and second protective shoulders formed on said plurality of core gate stacks and periphery gates, such that a dopant can be implanted sequentially into source and drain regions of a substrate supporting the stacks to establish transistors and such that charge migration into said at least one side of the gate stacks during interlayer dielectric (ILD) formation and device metallization is prevented, at least the second shoulder being frabricated from at least one material selected from a group consisting essentially of nitride and silicon oxynitride (SiON).
机译:衬底上的多个核心栅叠层和外围栅,每个核心栅叠层和外围栅具有至少一个侧面以及形成在所述多个核心栅叠层和外围栅上的第一和第二保护肩,从而可以注入掺杂剂顺序地进入支撑堆叠的衬底的源极和漏极区域以建立晶体管,从而防止电荷在层间介电层(ILD)形成和器件金属化过程中迁移到栅极堆叠的至少一侧,至少第二肩被成纤选自基本上由氮化物和氮氧化硅(SiON)组成的组中的至少一种材料。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号