首页> 外国专利> Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD

Dielectric gap fill process that effectively reduces capacitance between narrow metal lines using HDP-CVD

机译:介电间隙填充工艺可使用HDP-CVD有效降低窄金属线之间的电容

摘要

Substrate bombardment during HDP deposition of carbon-doped silicon oxide film results in filling the gaps between metal lines with carbon-doped low k dielectric material. This leads to the placement of low k dielectric between the narrow metal lines while the films over the metal lines have higher dielectric constant due to removal of carbon from these films during ion bombardment. Films over the metal lines have properties similar to silicon dioxide and are ready for sequential integration processes.
机译:在HDP沉积碳掺杂的氧化硅膜期间进行基板轰击会导致金属线之间的间隙被碳掺杂的低k介电材料填充。这导致在窄金属线之间放置低k电介质,而金属线上方的膜由于在离子轰击过程中从这些膜中去除了碳而具有较高的介电常数。金属线上的膜具有类似于二氧化硅的特性,并准备用于顺序集成过程。

著录项

  • 公开/公告号US6348421B1

    专利类型

  • 公开/公告日2002-02-19

    原文格式PDF

  • 申请/专利权人 NATIONAL SEMICONDUCTOR CORPORATION;

    申请/专利号US19990334288

  • 发明设计人 JEN SHU;MICHAEL E. THOMAS;

    申请日1999-06-16

  • 分类号H01L213/10;

  • 国家 US

  • 入库时间 2022-08-22 00:47:41

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