首页> 外国专利> Integrated circuit memory devices having data selection circuits therein which are compatible with single and dual data rate mode operation and methods of operating same

Integrated circuit memory devices having data selection circuits therein which are compatible with single and dual data rate mode operation and methods of operating same

机译:具有与单和双数据速率模式操作兼容的数据选择电路的集成电路存储装置及其操作方法

摘要

Integrated circuit memory devices include first and second memory banks, first and second local data lines electrically coupled to the first and second memory banks, respectively, and a multiplexer having first and second inputs electrically coupled to first and second data bus lines, respectively. A data selection circuit is also provided which routes data from the first and second local data lines to the first and second data bus lines, respectively, when a selection control signal is in a first logic state and routes data from the second and first local data lines to the first and second data bus lines, respectively, when a selection control signal is in a second logic state opposite the first logic state. A control signal generator is also provided. This control signal generator generates the selection control signal in the first and second logic states when a first address in a string of burst addresses is even and odd, respectively.
机译:集成电路存储装置包括第一和第二存储体,分别电耦合到第一和第二存储体的第一和第二本地数据线,以及具有分别分别电耦合到第一和第二数据总线线的第一和第二输入的多路复用器。数据选择电路,还提供了路线从所述第一和第二局部数据线的数据到第一和第二数据总线线路,分别,当选择控制信号是从所述第二的第一逻辑状态和路线数据和第一局部数据线到所述第一和第二数据总线线路,分别,当选择控制信号是在相反的第一逻辑状态的第二逻辑状态。还提供了控制信号发生器。当串地址串中的第一地址分别为偶数和奇数时,该控制信号发生器产生处于第一和第二逻辑状态的选择控制信号。

著录项

  • 公开/公告号US6477107B1

    专利类型

  • 公开/公告日2002-11-05

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号US20000654148

  • 发明设计人 JUNG-BAE LEE;

    申请日2000-09-01

  • 分类号G11C80/00;

  • 国家 US

  • 入库时间 2022-08-22 00:46:52

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