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Redundancy circuits for integrated circuit memory devices including repair controlling circuits and enable controlling circuits
Redundancy circuits for integrated circuit memory devices including repair controlling circuits and enable controlling circuits
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机译:用于集成电路存储设备的冗余电路,包括修复控制电路和使能控制电路
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摘要
Integrated circuit memory device redundancy circuits include a plurality of field effect transistors and fuses, a respective field effect transistor and a respective fuse being serially coupled between a respective address line and a logic circuit to generate a selection signal for a redundant memory cell in response to a predetermined address on the address lines. A pump-up circuit generates a pump-up voltage from a power supply voltage, wherein the pump-up voltage is greater than the power supply voltage. The pump-up voltage is applied to the gates of the field effect transistors to activate the redundancy circuit. According to another aspect, a redundancy circuit for an integrated circuit memory device comprises a repair controlling circuit that includes a repair fuse and that generates a repair control signal in response to opening of the repair control fuse. The enable controlling circuit is responsive to the repair controlling circuit and includes an enable fuse to generate a redundant enable signal in response to the repair control signal and opening of the enable fuse. A redundancy signal generator is responsive to the enable controlling circuit to generate a selection signal for a redundant memory cell in response to receipt of an address of a defective memory cell.
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