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Formation of shallow and deep trenches for isolation of semiconductor devices involves forming shallow trench(es), dielectric layer, opening(s) in dielectric layer, spacer, and deep trench in opening
Formation of shallow and deep trenches for isolation of semiconductor devices involves forming shallow trench(es), dielectric layer, opening(s) in dielectric layer, spacer, and deep trench in opening
Shallow and deep trenches are formed by forming (a) shallow trenches on a substrate, (b) dielectric layer, (c) opening(s) (33) in the dielectric layer using a mask (22) with an edge aligned to an edge (26) of the shallow trench, (d) a spacer (32) in and along the edge of the shallow trench, and (e) a deep trench (34) in the opening using the dielectric layer as a hard mask. Formation of shallow and deep trenches for isolation of semiconductor devices in the integrated circuit comprises: forming shallow trench(es) using a first mask formed on a substrate; forming a dielectric layer (20) of a predetermined thickness; forming opening(s) in the dielectric layer using a second mask (22) with an edge of the second mask aligned to an edge of the shallow trench with a maximum misalignment of half the predetermined thickness of the dielectric layer; forming a spacer in the shallow trench and along the edge of the trench; and forming a deep trench in the opening using the dielectric layer as a hard mask. The width of the spacer is equal to the predetermined thickness of the dielectric layer. The deep trench extends further into the substrate and is self-aligned to the shallow trench. An Independent claim is also included for an integrated circuit for radio frequency applications fabricated using the above method.
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