首页> 外国专利> Multiple-valued logic circuit architecture: supplementary symmetrical logic circuit structure (SUS-LOC)

Multiple-valued logic circuit architecture: supplementary symmetrical logic circuit structure (SUS-LOC)

机译:多值逻辑电路结构:补充对称逻辑电路结构(SUS-LOC)

摘要

Circuit structure and resulting circuitry for multiple-valued logic. The circuit structure allows the design and fabrication of any r-valued logic function of n-places where r is an integer greater than 1 and n is an integer greater than 0. This structure is called SUpplementary Symmetrical LOgic Circuit structure (SUS-LOC). In circuits incorporating SUS-LOC, circuit branches are realized that uniquely deliver circuit response and output. For some circuits, and due to the operating characteristics of the switch elements, additional circuit elements, or stages, must be incorporated to prevent "back biasing." SUS-LOC is fully active. Only active elements perform logic synthesis and those components not directly related to logic synthesis, such as resistors and/or other passive loads, are relegated the task of circuit protection. The fabrication of r-valued, multi-valued, or multiple-valued logic circuits, designed using the definitions of the SUS-LOC structure can be accomplished with known techniques, materials, and equipment.
机译:用于多值逻辑的电路结构和所得电路。该电路结构允许设计和制造n位的任何r值逻辑函数,其中r为大于1的整数,n为大于0的整数。此结构称为补充对称本机电路结构(SUS-LOC) 。在包含SUS-LOC的电路中,实现了可唯一传递电路响应和输出的电路分支。对于某些电路,由于开关元件的工作特性,必须合并其他电路元件或级,以防止“反向偏置”。 SUS-LOC已完全激活。只有有源元件才能执行逻辑综合,而那些与逻辑综合不直接相关的组件(例如电阻器和/或其他无源负载)则属于电路保护任务。使用SUS-LOC结构的定义设计的r值,多值或多值逻辑电路的制造可以使用已知的技术,材料和设备来完成。

著录项

  • 公开/公告号AU750648B2

    专利类型

  • 公开/公告日2002-07-25

    原文格式PDF

  • 申请/专利权人 EDGAR DANNY OLSON;

    申请/专利号AU19990044073

  • 发明设计人 EDGAR DANNY OLSON;

    申请日1999-05-21

  • 分类号H03K19/094;H03K19/00;

  • 国家 AU

  • 入库时间 2022-08-22 00:39:14

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号