SYNCHRONOUS MEMORY MODULES AND MEMORY SYSTEMS WITH SELECTABLE CLOCK TERMINATION

摘要

PURPOSE: Synchronous memory modules and systems are provided to realize a fully forward and backward compatible memory solution. CONSTITUTION: The gate of the N-FET is connect in parallel to a default driver(246) which is a connection to DIMM power supply Vcc through a resistor. The value of the resistor may be selected as appropriate for the switch specifications. The default driver preferably acts to maintain the switch in the "on" position such that termination of the clock is achieved through FET switch(245). If the resistive load of FET switch(245) is inadequate by itself for the desired termination, additional resistive load(s) can be incorporated in series with FET switch(245) between the differential clock line pair. The default state of switch(245) can be overridden by input(290) from memory system(10). Input(290) is connected to an unused pin of the DIMM, for example in a 184 pin DIMM, pins such as numbers.