A SEMICONDUCTOR DEVICE AND A METHOD OF FAILURE ANALYSIS OF LSI USING THE SEMICONDUCTOR DEVICE

摘要

Develop TEG showing a plurality of defect to a different category.; The first wiring 12 is arranged on a straight line in the first row or first column of the memory cell array. Second wiring (13) is disposed on the first wiring 12 and transmits a signal from one end toward the other end. The contact plugs 14 are delivered to the first wiring 12 with the second wiring 13. The first wiring 12 is connected to a plurality of memory cells a row of all the memory cells in the row or column it belongs. Manufacturing such a LSI, and performs a failure analysis when creating the FBM, one row or a contact plug for connecting the first wiring (12) when the plurality of memory cells is defective continuously in the first column to the second wiring 13 it is determined that the 14 break.