METHOD FOR FABRICATING SELF-ALIGNED THIN-FILM TRANSISTORS TO DEFINE A DRAIN AND SOURCE IN A SINGLE PHOTOLITHOGRAPHIC STEP

摘要

The present invention relates to a method of manufacturing a thin film transistor in which source and drain electrodes are self-aligned to a gate electrode by using a one-step lithography process, the method comprising: forming an opaque gate electrode on a substrate, on the gate electrode and the substrate Depositing a first dielectric layer, depositing a semiconductor layer over the first dielectric layer, and depositing a second dielectric layer over the semiconductor layer. The first photoresist is deposited over the second dielectric layer and the first photoresist is patterned using the gate electrode as a mask to block light used to expose the first photoresist. The second dielectric layer is etched to form an upper insulator portion of the second dielectric layer aligned with the gate electrode. The first photoresist is removed. The doped semiconductor layer and the conductor layer are deposited. A second photoresist is formed on the conductor layer. The second photoresist is patterned to form a pattern of components, and a continuous transistor electrode pattern covering the upper insulator portion is formed. The second photoresist and the conductor layer are non-selectively etched to form a gap in the second photoresist for forming a transistor electrode pattern on the upper insulator portion. The conductor layer and the doped semiconductor layer are etched in a selective manner to the second photoresist to form self-aligned source and drain electrodes with respect to the gate electrode.