Logic unit according to byzantinem algorithm computer unit with the logic unit, composite of logic - or computer units and method for operating such a composite

摘要

The present invention relates to a logic unit according to the byzantines algorithm for the construction of a at the same time an f number of errors can be tolerated with a plurality of inputs for reading in of data in register in a register set and a plurality of outputs for reading data from the registers, wherein each output to an input of a further logic unit is connectable, wherein the register in such a manner with the inputs and outputs are coupled, that each register independently of the position of the logic unit within the composite by means of a position invariant, relative to the identification of a - and can be read out. Furthermore, the invention relates to a computer unit with such a logic unit as well as a fault tolerant composite such logic - / computer units. Finally, the invention also relates to a method for operating a fault tolerant composite.