Arithmetic Logic Unit Using Diode Free Adiabatic Logic and Selection Unit for Adiabatic Logic Family

摘要

Reduction in energy dissipation is an active area of research. Systems which consume power require the deployment of expensive cooling systems. In this paper a 1-bit ALU circuit has been designed in diode free adiabatic logic methodology which has much superior performance than CMOS circuits considering power dissipation and power delay product. An apt selection unit for adiabatic logic circuits has also been proposed. Two types of multiplexer circuits are designed, first by DFAL method, and second using transmission gates. The performance of DFAL based circuits connected to both types of multiplexers is observed. The performance of the circuits is verified through simulations in Tanner EDA simulator using 180nm CMOS TSMC parameters, as these are the achievable parameters in India for fabrication. Higher energy efficiency is achieved in the proposed circuit.