Joint verification manner and joint verification device null of test

摘要

PROBLEM TO BE SOLVED: To provide a verifying method for the test circuit which makes it possible to detect test a circuit misinsertion and can shorten the design period. ;SOLUTION: The signal path of wiring in the connection state of the test circuit in normal mode wherein no circuit test is conducted, is found. The signal path of wiring in the connection state of the test circuit in test mode wherein a circuit test is conducted is found. It is confirmed that the signal path of wiring in the normal mode is included in the signal path of wiring in the test mode and then it is judged that the signal path in the normal mode can be checked by the wiring connection of the test circuit. Consequently, such system is obtained that inspects whether or not, there is a defective in wiring for inserting the test circuit between circuit blocks.;COPYRIGHT: (C)1997,JPO