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The reconstruction possible integrated circuit which has the integrated debugging function for the emulation system

机译:具有仿真系统集成调试功能的可重构集成电路

摘要

(57) Abstract The integrated circuit is explained as those which include the plural logic elements (LE) which possess plural outputs and the part scan register. As for said plural LE, corresponding, responding to the plural input which are given to LE, in order to form plural outputs, it can operate. When the part scan register is connected, in order for reconstruction to be possible in those which are selected from LE, becomes active state, the part scan register catches the record of the signal status value circuit element which is emulated by LE which is selected in the specific clock cycle of the operating clock, in order to output to the scan bus, operates, in there, the part scan register makes enabled by the application of the scan clock which is proportionate to the operating clock appropriately.
机译:(57)<摘要>将集成电路解释为包括具有多个输出的多个逻辑元件(LE)和部分扫描寄存器的集成电路。关于所述多个LE,对应于赋予给LE的多个输入,为了形成多个输出,可以进行动作。当连接部分扫描寄存器时,为了使从LE中选择的那些寄存器能够变为活动状态,部分扫描寄存器会捕获由在其中选择的LE模拟的信号状态值电路元件的记录。为了输出到扫描总线,工作时钟的特定时钟周期在那里工作,部分扫描寄存器通过应用与工作时钟成比例的扫描时钟来使能。

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