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The reconstruction possible integrated circuit which has the integrated debugging function for the emulation system
The reconstruction possible integrated circuit which has the integrated debugging function for the emulation system
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机译:具有仿真系统集成调试功能的可重构集成电路
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摘要
(57) Abstract The integrated circuit is explained as those which include the plural logic elements (LE) which possess plural outputs and the part scan register. As for said plural LE, corresponding, responding to the plural input which are given to LE, in order to form plural outputs, it can operate. When the part scan register is connected, in order for reconstruction to be possible in those which are selected from LE, becomes active state, the part scan register catches the record of the signal status value circuit element which is emulated by LE which is selected in the specific clock cycle of the operating clock, in order to output to the scan bus, operates, in there, the part scan register makes enabled by the application of the scan clock which is proportionate to the operating clock appropriately.
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