A RECONFIGURABLE INTEGRATED CIRCUIT WITH INTEGRATED DEBUGGING FACILITIES FOR USE IN AN EMULATION SYSTEM

摘要

An integrated circuit is described as comprising a plurality of logic elements(LEs), each of which having a plurality of outputs, and a partial scanregister. Theplurality of LEs are operative to generate a plurality of output signals inresponse toa plurality of input signals correspondingly applied to the LEs. The partialscanregister is reconfigurably coupled to select ones of the LEs such that, whenenabled, the partial scan register is operative to capture and output on ascan bus arecord of signal state values of circuit elements emulated by the selected LEsin aparticular clock cycle of an operating clock, wherein the partial scanregister isenabled with application of a scan clock appropriately scaled to the operatingclock.