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METHOD FOR TESTING INTEGRATED CIRCUIT USING INTEGRATED DEBUGGING CIRCUIT

机译:使用集成调试电路测试集成电路的方法

摘要

PROBLEM TO BE SOLVED: To provide a testing method capable of integrating microprocessor test input with test hardware input. ;SOLUTION: This method simulates an integrated circuit 110 and generates an input vector to an integrated circuit 110 and expected output from the integrated circuit. This input vector and expected output are generated by entering test vectors into the circuit simulator and the integrated circuit is tested using the input vector 113 to yield a first resulting output. The test hardware vector 109 is also created to capture state information pertaining to the integrated circuit. The test hardware vector and the input vector are combined to create a joint input vector 111 and debugging is performed on the integrated circuit by modifying the joint input vector and evaluating the resulting output.;COPYRIGHT: (C)2003,JPO
机译:要解决的问题:提供一种能够将微处理器测试输入与测试硬件输入集成在一起的测试方法。解决方案:该方法模拟集成电路110,并产生到集成电路110的输入矢量和来自集成电路的预期输出。通过将测试向量输入电路仿真器来生成该输入向量和预期输出,并使用输入向量113对集成电路进行测试以产生第一结果输出。还创建测试硬件矢量109以捕获与集成电路有关的状态信息。测试硬件向量和输入向量被组合以创建联合输入向量111,并通过修改联合输入向量并评估结果输出来在集成电路上进行调试。版权所有:(C)2003,JPO

著录项

  • 公开/公告号JP2003036183A

    专利类型

  • 公开/公告日2003-02-07

    原文格式PDF

  • 申请/专利权人 HEWLETT PACKARD CO HP;

    申请/专利号JP20020139368

  • 发明设计人 BERKRAM DANIEL A;IMARK ROBERT R;

    申请日2002-05-15

  • 分类号G06F11/22;G01R31/28;G01R31/3183;

  • 国家 JP

  • 入库时间 2022-08-22 00:12:30

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