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Capacitive folding circuit for use in a folding/interpolating analog-to-digital converter

机译:用于折叠/内插模数转换器的电容式折叠电路

摘要

An M-bit folding/interpolating analog-to-digital converter (ADC) circuit, comprising a reference voltage generator, a converter, an interpolator, an amplifying stage, a comparator, and an encoder. The converter has an amplifier that receives at least one of a plurality of first reference voltage signals and outputs a plurality of coarse bits. The converter also has N-number of folding blocks, which output a plurality of folded signals. Each folding block comprises a plurality of capacitors, a differential amplifier and a feedback element. The folded signals output by the converter are then interpolated, amplified, compared and output as a plurality of fine bits. The encoder receives the coarse and fine bits and outputs the digital signal.
机译:一种M位折叠/内插模数转换器(ADC)电路,包括参考电压发生器,转换器,内插器,放大级,比较器和编码器。该转换器具有放大器,该放大器接收多个第一参考电压信号中的至少一个并输出多个粗略位。转换器还具有N个折叠块,可输出多个折叠信号。每个折叠块包括多个电容器,差分放大器和反馈元件。然后,对转换器输出的折叠信号进行插值,放大,比较并作为多个精细位输出。编码器接收粗略和精细位并输出数字信号。

著录项

  • 公开/公告号US2002196172A1

    专利类型

  • 公开/公告日2002-12-26

    原文格式PDF

  • 申请/专利权人 BROADCOM CORPORATION;

    申请/专利号US20020071252

  • 发明设计人 KLAAS BULT;

    申请日2002-02-11

  • 分类号H03M1/34;

  • 国家 US

  • 入库时间 2022-08-22 00:09:30

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