LOW DEFECT DENSITY PROCESS FOR DEEP SUB-0.18MUM FLASH MEMORY TECHNOLOGIES

摘要

A method of forming flash memory EEPROM devices having a low energy source implant and a high-energy V_SS connection implant such that the intrinsic source defect density is reduced and the V_Ss resistance is low. The source regions are implanted with a low energy, low dosage dopant ions and the V_SS regions are implanted with a high energy, high dosage dopant ions.