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Ordering binary decision diagrams used in the formal equivalence verification of digital designs
Ordering binary decision diagrams used in the formal equivalence verification of digital designs
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机译:在数字设计的形式等效验证中使用的订购二进制决策图
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摘要
A method for ordering input variables in binary decision diagrams is described. Once a plurality of disjoint sets of input variables can be found from the sub-equations of a Boolean function, an initial top-level order can be used to form a significantly smaller diagram. The diagram can by reduced further by application of the method recursively on the sub-equations and successive sub-equations until primary inputs are reached.
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