首页>
外国专利>
Methods for fabricating a semiconductor chip having CMOS devices and fieldless array
Methods for fabricating a semiconductor chip having CMOS devices and fieldless array
展开▼
机译:具有CMOS器件和无场阵列的半导体芯片的制造方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method for etching an oxide-nitride-oxide (ONO) layer fabricated on a semiconductor wafer, the ONO layer including a lower oxide layer, a nitride layer located over the lower oxide layer, and an upper oxide layer located over the nitride layer. The method includes the steps of removing the upper oxide layer and a portion of the nitride layer using an isotropic plasma enhanced etch, and then removing the remainder of the nitride layer and a portion of the lower oxide layer using an isotropic plasma enhanced etch, wherein the semiconductor wafer is not exposed through the lower oxide layer. The method can be used to form gate electrodes and diffusion bit liens in a fieldless array of non-volatile memory cells.
展开▼