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Method for design optimization using logical and physical information

机译:使用逻辑和物理信息进行设计优化的方法

摘要

A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.
机译:提供了一种使用逻辑和物理信息进行设计优化的方法。在一个实施例中,一种用于使用逻辑和物理信息进行设计优化的方法,包括:接收集成电路或集成电路的一部分的行为描述;根据第一成本函数优化电路元件的放置;以及优化电路的逻辑。根据第二成本函数的电路元件,其中电路元件的优化放置和电路元件的优化逻辑同时进行。该方法可以进一步包括根据第三成本函数来优化路由,其中​​同时执行优化路由,电路元件的优化布置以及电路元件的优化逻辑。

著录项

  • 公开/公告号US6557145B2

    专利类型

  • 公开/公告日2003-04-29

    原文格式PDF

  • 申请/专利权人 MONTEREY DESIGN SYSTEMS INC.;

    申请/专利号US20010801010

  • 发明设计人 DOUGLAS B. BOYLE;JAMES S. KOFORD;

    申请日2001-03-06

  • 分类号G06F175/00;

  • 国家 US

  • 入库时间 2022-08-22 00:04:49

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