首页> 外国专利> Process for fabricating integrated multi-crystal silicon resistors in MOS technology, and integrated MOS device comprising multi-crystal silicon resistors

Process for fabricating integrated multi-crystal silicon resistors in MOS technology, and integrated MOS device comprising multi-crystal silicon resistors

机译:MOS技术中的集成多晶硅电阻器的制造方法以及包括该多晶硅电阻器的集成mos装置

摘要

A fabrication process and an integrated MOS device having multi-crystal silicon resisters are described. The process includes depositing a multi-crystal silicon layer on top of a single-crystal silicon body; forming silicon oxide regions on top of the multi-crystal silicon layer in zones where resistors are to be produced; depositing a metal silicide layer on top of and in contact with the multi-crystal silicon layer so as to form a double conductive layer; and shaping the conductive layer to form gate regions, of MOS transistors. During etching of the double conductive layer, the metal silicide layer on top of the silicon oxide regions is removed and the silicon oxide regions form masking regions for the multi-crystal silicon underneath, so as to form resistive regions having a greater resistivity than the gate regions.
机译:描述了具有多晶硅电阻器的制造工艺和集成的MOS器件。该工艺包括在单晶硅体的顶部上沉积多晶硅层;在要制造电阻器的区域中的多晶硅层的顶部上形成氧化硅区域;在多晶硅层之上并与之接触沉积金属硅化物层,以形成双导电层;使导电层成形以形成MOS晶体管的栅极区域。在双导电层的蚀刻过程中,去除氧化硅区域顶部的金属硅化物层,并在其下方形成用于多晶硅的掩模区域,以形成电阻率比栅极大的电阻区域。地区。

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