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Microelectronic fabrication having formed therein terminal electrode structure providing enhanced barrier properties

机译:在其中形成了提供增强的阻挡性能的终端电极结构的微电子制造

摘要

Within both a method for fabricating a microelectronic fabrication, and the microelectronic fabrication fabricated employing the method, there is first provided a substrate. Within the method, there is then formed over the substrate a patterned bond pad layer. There is then formed over the patterned bond pad layer a barrier layer comprising: (1) a first titanium-tungsten alloy layer; (2) a titanium-tungsten alloy nitride layer formed upon the first titanium-tungsten alloy layer; and (3) a second titanium-tungsten alloy layer formed upon the titanium-tungsten alloy nitride layer. Finally, there is then formed upon the barrier layer a seed layer which comprises a titanium layer formed upon the barrier layer. The method contemplates a microelectronic fabrication fabricated employing the method. The barrier layer provides enhanced barrier properties within the microelectronic fabrication within which is formed the barrier layer.
机译:在用于制造微电子制造的方法以及利用该方法制造的微电子制造中,首先提供衬底。在该方法内,然后在衬底上方形成图案化的键合焊盘层。然后在构图的焊盘层上形成阻挡层,该阻挡层包括:(1)第一钛-钨合金层;以及(2)在第一钛-钨合金层上形成钛-钨合金氮化物层; (3)在钛-钨合金氮化物层上形成第二钛-钨合金层。最后,然后在阻挡层上形成种子层,该种子层包括在阻挡层上形成的钛层。该方法预期采用该方法制造的微电子制造。阻挡层在微电子制造中提供增强的阻挡特性,在该微电子制造中形成阻挡层。

著录项

  • 公开/公告号US6544878B2

    专利类型

  • 公开/公告日2003-04-08

    原文格式PDF

  • 申请/专利权人 APTOS CORPORATION;

    申请/专利号US20010970231

  • 发明设计人 TSING-CHOW WANG;

    申请日2001-10-03

  • 分类号H01L214/40;

  • 国家 US

  • 入库时间 2022-08-22 00:04:27

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