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Integrated circuit package having die with staggered bond pads and die pad assignment methodology for assembly of staggered die in single-tier ebga packages

机译:具有带有交错键合焊盘的裸片的集成电路封装以及用于将交错裸片组装到单层ebga封装中的裸片焊盘分配方法

摘要

A single tier cavity down integrated circuit package having a die with outer bond pads and staggered inner bond pads is described. The bond pads of the die are assigned to associated supply rings and bond fingers of the package according to a design methodology where in one embodiment at least all bond pads connected to the supply rings are outer bond pads, and staggered inner bond pads are connected to bond fingers. There is further described a method for assigning bond pads of the die to associated supply rings and bond fingers of the package, as well as, a die having staggered bond pads formed in accordance with the method of the present invention.
机译:描述了具有带有外键合焊盘和交错的内键合焊盘的管芯的单层空腔向下集成电路封装。根据一种设计方法,将管芯的键合焊盘分配给封装的相关供应环和键合指,其中在一个实施例中,至少所有连接到供应环的键合焊盘都是外键合焊盘,交错的内键合焊盘连接到粘合手指。进一步描述了一种用于将管芯的键合焊盘分配给封装的相关供应环和键合指的方法,以及具有根据本发明的方法形成的具有交错的键合焊盘的管芯。

著录项

  • 公开/公告号US6603199B1

    专利类型

  • 公开/公告日2003-08-05

    原文格式PDF

  • 申请/专利权人 NATIONAL SEMICONDUCTOR CORPORATION;

    申请/专利号US20000724739

  • 发明设计人 ANINDYA PODDAR;

    申请日2000-11-28

  • 分类号H01L235/20;

  • 国家 US

  • 入库时间 2022-08-22 00:04:29

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