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Production of vertically doubled diffused MOS transistor comprises forming gate oxide layer on wafer, depositing polysilicon layer on wafer, applying further oxide layer, structuring, and further processing
Production of vertically doubled diffused MOS transistor comprises forming gate oxide layer on wafer, depositing polysilicon layer on wafer, applying further oxide layer, structuring, and further processing
The production of a vertically doubled diffused MOS transistor comprises forming a gate oxide layer (3) on a wafer (1); depositing a polysilicon layer (4) on the wafer; applying a further oxide layer; structuring the three-layer system formed; forming a sink region (5) by ion implantation and high temperature diffusion; forming a source region (6) in the sink region; depositing a further oxide layer; anisotropically plasma-chemical etching to remove the further oxide layer; anisotropically etching to form a trench by separating the source region and exposing the sink region using a spacer oxide; isotropically etching the spacer oxide in the lateral and vertical direction; and metallizing. An Independent claim is also included for a MOS transistor produced by the above process.
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