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Power semiconductor device e.g. power MOSFET has channel stop structure formed in peripheral portion of semiconductor substrate with trench formed in main surface of substrate

机译:功率半导体器件功率MOSFET具有在半导体衬底的外围部分中形成的沟道停止结构,并且在衬底的主表面中形成有沟槽

摘要

A transistor has a P-type impurity implantation region (4) which is formed in a main surface (3) of an N-type semiconductor substrate (1) and which constitutes a main structure with the substrate. A channel stop structure formed in a peripheral portion of the substrate, has a trench (5) formed in the main surface of the semiconductor substrate. An Independent claim is also included for power metal oxide semiconductor field effect transistor manufacture method.
机译:晶体管具有形成在N型半导体衬底(1)的主表面(3)中并构成衬底的主要结构的P型杂质注入区域(4)。在衬底的外围部分中形成的沟道停止结构具有在半导体衬底的主表面中形成的沟槽(5)。功率金属氧化物半导体场效应晶体管的制造方法也包括独立权利要求。

著录项

  • 公开/公告号DE10224003A1

    专利类型

  • 公开/公告日2003-05-15

    原文格式PDF

  • 申请/专利权人 MITSUBISHI DENKI K.K. TOKIO/TOKYO;

    申请/专利号DE2002124003

  • 发明设计人 TAKAHASHI HIDEKI;AONO SHINJI;

    申请日2002-05-29

  • 分类号H01L29/78;H01L21/76;H01L29/73;

  • 国家 DE

  • 入库时间 2022-08-21 23:41:58

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