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Power semiconductor device e.g. power MOSFET has channel stop structure formed in peripheral portion of semiconductor substrate with trench formed in main surface of substrate
Power semiconductor device e.g. power MOSFET has channel stop structure formed in peripheral portion of semiconductor substrate with trench formed in main surface of substrate
A transistor has a P-type impurity implantation region (4) which is formed in a main surface (3) of an N-type semiconductor substrate (1) and which constitutes a main structure with the substrate. A channel stop structure formed in a peripheral portion of the substrate, has a trench (5) formed in the main surface of the semiconductor substrate. An Independent claim is also included for power metal oxide semiconductor field effect transistor manufacture method.
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