Integrated circuit one time programmable memory cell having two branches with silicon programming resistor connected one terminal and differential memory state reading terminals with switches connecting read/second terminal.

摘要

The binary memory cell has two parallel branches. Each branch has a polycrystalline silicon programming resistor (Rp1,Rp2) connected to a terminal (1). There is a terminal point for a differential reading (4,6) of the memory state. There are switches (MNP1,MNP2) which during programming connect one of the read terminals to a second terminal (2).