SRAM CELL WITH REDUCED STANDBY LEAKAGE CURRENT AND METHOD OF FORMING SAME

摘要

PROBLEM TO BE SOLVED: To suppress the standby leakage current of a SRAM cell, i.e. suppress the standby leakage current without having any adverse effects on performance.;SOLUTION: In an integrated circuit comprising a SRAM cell 4 including a p-channel transistor 8 and a n-channel transistor 6 and a logic part 5 including a p-channel transistor 10, leakage current is reduced by increasing the threshold voltage of the SRAM p-channel transistor 8. Specifically, this is achieved by forming the gate oxide film 22 of the SRAM p-channel transistor 8 thicker than the SRAM n-channel transistor 6 and the gate oxide film 30 of the transistor 10 of the logic part 5, or by utilizing the effective thickening of a gate oxide film due to an increase in a depletion layer through counter doping the p-type gate electrode of the SRAM p-channel transistor with n-type impurities.;COPYRIGHT: (C)2004,JPO