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Method of making a single chip and complementary MOS transistors and vertical-type npn bipolar transistor for high-speed
Method of making a single chip and complementary MOS transistors and vertical-type npn bipolar transistor for high-speed
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机译:高速制造单芯片的方法以及互补型mos晶体管和垂直型npn双极晶体管
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摘要
The present invention is directed to a method of making a single chip vertical-type and npn bipolar transistor of high speed, and complementary MOS transistors. In order to produce a single chip and vertical-type npn bipolar transistor for high-speed, and complementary MOS transistors, fabrication of vertical structure of the emitter-collector in the active region of the npn transistor, and the base, and emitter collector region, the base region and I want to run before the creation of the gate insulating layer and the well with respect to the MOS transistor, all the steps of the technical structure of the horizontal direction of the area.
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