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Non-volatile memory cell sensing circuit, particularly for low power supply voltages and high capacitive load values

机译:非易失性存储单元感测电路,特别适用于低电源电压和高容性负载值

摘要

A sensing circuit for a memory cell includes a first bias current generator connected between a first voltage reference and a first inner circuit node, and a second reference current generator connected to the first voltage reference. A comparator having a first input terminal is connected to a comparison circuit node that is connected to the second reference current generator, a second input terminal is connected to a circuit node that is connected to the first inner circuit node, and an output terminal forms an output terminal of the sensing circuit. A cascode-configured bias circuit is connected between the inner circuit node and a matching circuit node. The cascode-configured bias circuit is also connected to a second voltage reference. A current/voltage conversion stage is connected to the matching circuit node, to the comparison circuit node, and to a third voltage reference.
机译:用于存储单元的感测电路包括:第一偏置电流发生器,连接在第一参考电压与第一内部电路节点之间;第二参考电流发生器,连接到第一参考电压。具有第一输入端的比较器连接到连接到第二参考电流发生器的比较电路节点,第二输入端连接到连接到第一内部电路节点的电路节点,输出端形成一个感测电路的输出端子。级联配置的偏置电路连接在内部电路节点和匹配电路节点之间。级联配置的偏置电路也连接到第二参考电压。电流/电压转换级连接到匹配电路节点,比较电路节点和第三参考电压。

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