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METHOD FOR FABRICATING MEMORY CELL STRUCTURE EMPLOYING CONTIGUOUS GATE AND CAPACITOR DIELECTRIC LAYER
METHOD FOR FABRICATING MEMORY CELL STRUCTURE EMPLOYING CONTIGUOUS GATE AND CAPACITOR DIELECTRIC LAYER
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机译:制造采用连续门和电容介电层的记忆细胞结构的方法
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摘要
A method for fabricating a memory cell structure provides for fabricating a capacitor within the memory cell structure within an asymmetric trench within an isolation region adjoining an active region such that a capacitor node layer within the capacitor contacts a sidewall of the active region and is electrically connected to a source/drain region within a field effect transistor device fabricated within the active region. The method also employs when fabricating the memory cell structure a contiguous dielectric layer as a gate dielectric layer within the field effect transistor device and a capacitor dielectric layer within the capacitor. The dynamic random access memory cell structure may be efficiently fabricated as an embedded dynamic random access memory cell structure.
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