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Receiver-side adaptive equalization in source-synchronous chip-to-chip communication systems
Receiver-side adaptive equalization in source-synchronous chip-to-chip communication systems
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机译:源同步芯片间通信系统中的接收器侧自适应均衡
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摘要
A communication system comprising transmitting circuitry arranged to transmit a data signal and a timing signal; and receiving circuitry arranged to receive the data signal and the timing signal. The receiving circuitry comprises a first finite impulse response filter arranged to generate a filtered timing signal dependent on the timing signal and a at least one mixer signal; a decision feedback circuit arranged to generate the at least one mixer signal dependent on the filtered timing signal and a calibration signal; and a second finite impulse response filter arranged to generate a filtered data signal dependent on the data signal and the at least one mixer signal.
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