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Stacked multi-chip package, process for fabrication of chip structuring package, and process for wire-bonding

机译:堆叠式多芯片封装,芯片结构封装的制造工艺和引线键合工艺

摘要

A stacked multi-chip package includes a substrate, a first chip and a second chip. The first chip is fixed to the substrate, and is provided with a collar portion which opposes an upper face of the substrate in a state such that a gap is formed between the upper face of the substrate and the collar portion. The second chip is disposed in a region below the collar portion. The second chip is fixed to the substrate and does not make contact with the first chip.
机译:堆叠式多芯片封装包括基板,第一芯片和第二芯片。第一芯片被固定到基板,并且设置有凸缘部分,该凸缘部分在基板的上表面和凸缘部分之间形成间隙的状态下与基板的上表面相对。第二芯片布置在凸缘部分下方的区域中。第二芯片固定到基板,并且不与第一芯片接触。

著录项

  • 公开/公告号US6777797B2

    专利类型

  • 公开/公告日2004-08-17

    原文格式PDF

  • 申请/专利权人 OKI ELECTRIC INDUSTRY. CO. LTD.;

    申请/专利号US20020330321

  • 发明设计人 YOSHIMI EGAWA;

    申请日2002-12-30

  • 分类号H01L230/20;

  • 国家 US

  • 入库时间 2022-08-21 23:20:06

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