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Fast CMOS adder with null-carry look-ahead

机译:具有空进位预读功能的快速CMOS加法器

摘要

A null-carry-lookahead adder is configured to generate and propagate a null-carry signal within and through blocks and groups of blocks within the adder. The null-carry signal terminates the effects of a carry input signal beyond the point at which the null-carry signal is generated. By forming rules for generating and propagating null-carry signals through blocks and groups of blocks within the adder, a maximum P-channel stack depth of two can be achieved for a four-bit adder block, thereby substantially improving the speed of the null-carry-lookahead adder, compared to a convention carry-lookahead adder that is based on generating and propagating carry signals within the adder.
机译:零进位超前加法器被配置为在加法器内的块和块组内并通过其生成和传播零进位信号。零进位信号终止进位输入信号的影响,超出了产生零进位信号的点。通过形成用于通过加法器中的块和块组生成和传播空载信号的规则,对于四位加法器块,最大P通道堆栈深度可以达到2,从而显着提高了空载信号的速度。与传统的超前进位加法器相比,传统的超前进位加法器基于在加法器中生成和传播进位信号。

著录项

  • 公开/公告号US6782406B2

    专利类型

  • 公开/公告日2004-08-24

    原文格式PDF

  • 申请/专利权人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;

    申请/专利号US20010877805

  • 发明设计人 KAMAL J. KOSHY;

    申请日2001-06-07

  • 分类号G06F75/00;

  • 国家 US

  • 入库时间 2022-08-21 23:18:52

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