首页> 外国专利> Replacing layers of an intergate dielectric layer with high-K material for improved scalability

Replacing layers of an intergate dielectric layer with high-K material for improved scalability

机译:用高K材料替换栅极间介电层的层以提高可伸缩性

摘要

A method of making and a semiconductor device formed on a semiconductor substrate having an active region. The semiconductor device includes a gate dielectric layer disposed on the semiconductor substrate. A floating gate is formed on the gate dielectric layer and defines a channel interposed between a source and a drain formed within the active region of the semiconductor substrate. A control gate is formed above the floating gate. Further, the semiconductor device includes an intergate dielectric layer interposed between the floating gate and the control gate. The intergate dielectric layer including a first, a second and a third layers. The first layer formed on the floating gate. The second layer formed on the first layer. The third layer formed on the second layer. Each of the first, second and third layers has a dielectric constant greater than SiO2 and an electrical equivalent thickness of less than about 50 angstroms (Å) of SiO2.
机译:一种具有有源区的半导体衬底的制造方法和形成的半导体器件。半导体器件包括设置在半导体衬底上的栅极介电层。浮置栅极形成在栅极电介质层上,并且限定了介于形成在半导体衬底的有源区内的源极和漏极之间的沟道。在浮置栅极上方形成控制栅极。此外,半导体器件包括插入在浮置栅极和控制栅极之间的栅极间电介质层。栅间电介质层包括第一,第二和第三层。第一层形成在浮置栅极上。第二层形成在第一层上。第三层形成在第二层上。第一,第二和第三层中的每一层均具有大于SiO 2 的介电常数,并且具有小于SiO 2 的约50埃的等效电学厚度。

著录项

  • 公开/公告号US6693321B1

    专利类型

  • 公开/公告日2004-02-17

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号US20020145952

  • 申请日2002-05-15

  • 分类号H01L297/60;H01L297/88;H01L310/62;H01L311/13;H01L311/19;

  • 国家 US

  • 入库时间 2022-08-21 23:14:16

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