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Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip

机译:将隆起的柔性导电迹线和绝缘基底连接到半导体芯片的方法

摘要

A method of connecting a conductive trace and an insulative base to a semiconductor chip includes providing a semiconductor chip, a conductive trace and an insulative base, wherein the chip includes a conductive pad, the conductive trace includes a bumped terminal, the bumped terminal includes a cavity that extends through the insulative base, and the insulative base contacts the conductive trace on a side opposite the chip, then forming a through-hole that extends through the insulative base and exposes the conductive trace and the pad, and then forming a connection joint that contacts and electrically connects the conductive trace and the pad. Preferably, an insulative adhesive that attaches the chip to the conductive trace or an encapsulant that encapsulates the chip fills the cavity and provides compressible mechanical support for the bumped terminal.
机译:一种将导电迹线和绝缘基底连接到半导体芯片的方法,包括提供半导体芯片,导电迹线和绝缘基底,其中所述芯片包括导电焊盘,所述导电迹线包括凸起的端子,所述凸起的端子包括穿过绝缘基底的空腔,并且绝缘基底在与芯片相对的一侧上与导电迹线接触,然后形成通孔,该通孔延伸穿过绝缘基底并露出导电迹线和焊盘,然后形成连接接头接触并电连接导电迹线和焊盘。优选地,将芯片附接到导电迹线的绝缘粘合剂或封装芯片的密封剂填充空腔并为凸出的端子提供可压缩的机械支撑。

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