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SEMICONDUCTOR DEVICE HAVING STRAINED SILICON AND SILICON GERMANIUM ALLOY LAYERS

机译:具有应变硅和硅锗合金层的半导体器件

摘要

A CMOS (complementary metal-oxide-silicon) heterojunction semiconductor device is formed by growing a virtual substrate (1) of silicon-germanium alloy on a silicon wafer (2), the silicon wafer (2) being in a relaxed state and the silicon-germanium alloy of the virtual substrate (1) having the formula Si1-xGex, where x varies between 0 and 0.25, and is typically 0.15. A first conduction layer (3) of silicon-germanium alloy having the formula Si1-yGey, where y is less than x+0.3 is then grown on the relaxed silicon-germanium substrate (1). Because of the higher average germanium density in first conduction layer (3) compared with virtual substrate (1), the separation of atoms in layer (3) is less than in virtual substrate (1), as a result of which layer (3) is under compressive strain. This significantly increases the conductivity of the layer (3) to holes compared with a relaxed layer (i.e. not under compressive strain) of the same material. A second conduction layer (4) of silicon is then grown on silicon-germanium alloy layer (3). Because the separation of silicon atoms is less than in silicon-germanium, the silicon layer (4) is placed under tensile stress, which significantly increases the conductivity of layer (4) to electrons.
机译:CMOS(互补金属氧化物硅)异质结半导体器件是通过在硅晶片(2)上形成松弛状态的硅晶片(2)和硅上生长硅锗合金的虚拟基板(1)形成的-具有式Si1-xGex的虚拟衬底(1)的β-锗合金,其中x在0和0.25之间变化,并且典型地为0.15。然后在松弛的硅锗衬底(1)上生长具有式Si1-yGey的硅锗合金的第一导电层(3),其中y小于x + 0.3。由于第一导电层(3)中的平均锗密度高于虚拟衬底(1),因此层(3)中的原子间距小于虚拟衬底(1)中的原子间距,结果是哪个层(3)处于压缩应变下。与相同材料的松弛层(即,不在压缩应变下)相比,这显着增加了层(3)对孔的导电性。然后,在硅锗合金层(3)上生长硅的第二导电层(4)。因为硅原子的分离小于硅锗中的分离,所以硅层(4)处于拉应力下,这显着增加了层(4)对电子的导电性。

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