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Providing high precision resistance in an integrated circuit using a thin film resistor of controlled dimension

机译:使用尺寸受控的薄膜电阻器在集成电路中提供高精度电阻

摘要

In one embodiment, an integrated circuit (10) includes a thin film resistor (12), which includes a resistor material that has been deposited on a substrate surface (14) within a channel (86) defined by opposing first and second portions (88) of a stencil structure (80a) formed on the substrate surface (14), the resistor material having an initial width determined by a width of the channel (86). The stencil structure (80a) has been adapted to receive a planarizing material that protects against reduction of the initial width of the resistor material during subsequent process steps for removing the stencil structure (80a). A head mask (22) overlays an end portion of the thin film resistor (12) and a dielectric (24) overlays the head mask (22), the dielectric (24) defming a via (28) formed in the dielectric (24) above a portion (26) of the head mask (22). A conductive material (30) has been deposited in the via (28), coupled to the portion (26) of the head mask (22) and electrically connecting the thin film resistor (12) to other components of the integrated circuit (10).
机译:在一个实施例中,集成电路(10)包括薄膜电阻器(12),该薄膜电阻器(12)包括已经沉积在由相对的第一部分和第二部分(88)限定的通道(86)内的衬底表面(14)上的电阻器材料。在形成于基板表面(14)上的模版结构(80a)中,电阻器材料的初始宽度由通道(86)的宽度确定。模板结构(80a)已经适于容纳平坦化材料,该平坦​​化材料防止在随后的用于去除模板结构(80a)的工艺步骤中减小电阻器材料的初始宽度。头掩模(22)覆盖薄膜电阻器(12)的端部,电介质(24)覆盖头掩模(22),电介质(24)限定在电介质(24)中形成的通孔(28)。在头罩(22)的一部分(26)上方。导电材料(30)已沉积在通孔(28)中,耦合至头罩(22)的部分(26),并将薄膜电阻器(12)电连接至集成电路(10)的其他组件。

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