Method for fabricating CMOSFET having dual-gate

摘要

PURPOSE: A method for manufacturing a CMOS transistor having a dual gate structure is provided to be capable of improving doping efficiency of gate electrodes without using an additional ion-implantation. CONSTITUTION: A gate oxide layer is formed on a semiconductor substrate(21) defined by a pMOS and nMOS region. An undoped polysilicon layer is formed on the gate oxide layer of the pMOS region, and an undoped polysilicon layer and a doped polysilicon layer are sequentially stacked on the gate oxide layer of the nMOS region. An integral doped polysilicon layer is formed at the nMOS region by diffusing dopants of the doped polysilicon layer into the undoped polysilicon layer. After the resultant structure is planarized, an NMOS gate electrode(28b) and a pMOS gate electrode(29a) are formed on the nMOS and pMOS region, respectively.