首页> 外国专利> Mask for highly integrated circuit device fabrication generating method of their layout fabrication method thereof and fabrication method for highly integrated circuit using the same

Mask for highly integrated circuit device fabrication generating method of their layout fabrication method thereof and fabrication method for highly integrated circuit using the same

机译:用于高度集成电路器件制造的掩模及其布局制造方法的产生方法以及使用该掩模的高度集成电路的制造方法

摘要

PURPOSE: A mask for manufacturing a high integrated circuit, a layout forming method thereof, a manufacturing method thereof, and a method for manufacturing a high integrated circuit device using the same are provided to be capable of minimizing total line width of a metal line of the high integrated circuit device. CONSTITUTION: A mask set for manufacturing a high integrated circuit is provided with a pair of phase shift regions for defining an access metal line and an alternate type phase shift mask(20) formed at the upper portion of a transparent substrate for defining the pair of phase shift region. At this time, the alternate type phase shift mask includes the first opaque pattern. The mask set further includes the second opaque pattern formed at the upper portion of the transparent substrate for preventing the access metal line from being erased and a half tone phase shift trim mask(30) for defining a pass metal line connected with the access metal line.
机译:目的:提供一种用于制造高集成电路的掩模,其布局形成方法,其制造方法以及使用该掩模的制造高集成电路器件的方法,以能够使金属的金属线的总线宽最小化。高集成电路器件。构成:用于制造高集成电路的掩模组,具有一对用于定义访问金属线的相移区域和另一种形成在透明基板上部的用于定义一对金属膜的交替型相移掩模(20)。相移区域。此时,替代型相移掩模包括第一不透明图案。掩模组还包括:第二透明图案,形成在透明基板的上部,用于防止擦除存取金属线;以及半色调相移修整掩模(30),用于限定与存取金属线连接的通过金属线。 。

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