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Memory control apparatus and method of controlling memory access capable of selecting page mode in order to reduce memory access time

机译:能够选择页面模式以便减少存储器访问时间的存储器控​​制装置和控制存储器访问的方法

摘要

PURPOSE: A memory controller capable of selecting a page mode to reduce a memory access time and a method for controlling memory access are provided to remarkably shorten the memory access time by flexibly deciding the page mode through comparison between a page hit ratio of each bus master and a threshold page hit ratio. CONSTITUTION: A storing circuit(310) receives/stores the threshold page hit ratio for each bus mater. A calculating circuit(323) calculates/outputs the page hit ratio of each bus master by receiving a memory access amount and the page hit ratio from each bus master. A comparing circuit(330) outputs a page mode control signal by comparing the threshold page hit ratio with the page hit ratio calculated from the calculating circuit.
机译:目的:提供一种能够选择页面模式以减少存储器访问时间的存储器控​​制器和一种用于控制存储器访问的方法,以通过比较每个总线主控器的页面命中率来灵活地确定页面模式,从而显着缩短存储器访问时间。以及网页点击率阈值。构成:存储电路(310)接收/存储每个总线母线的阈值页面命中率。计算电路(323)通过从每个总线主控器接收存储器访问量和页面访问率来计算/输出每个总线主控器的页面访问率。比较电路(330)通过将阈值页面点击率与从计算电路计算出的页面点击率进行比较来输出页面模式控制信号。

著录项

  • 公开/公告号KR20040021485A

    专利类型

  • 公开/公告日2004-03-10

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20020053334

  • 发明设计人 KIM YEONG SIK;

    申请日2002-09-04

  • 分类号G06F13/16;

  • 国家 KR

  • 入库时间 2022-08-21 22:49:35

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