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Memory control apparatus and method for controlling memory access capable of selecting desirable page mode

机译:能够选择期望的页面模式的用于控制存储器访问的存储器控​​制装置和方法

摘要

In a memory control apparatus and a method for controlling memory access capable of selecting a desirable page mode, so as to reduce memory access time, a storage circuit receives threshold page hit ratios for each of a plurality of bus masters, and stores the threshold page hit ratios. A page hit ratio computing circuit receives the number of memory accesses by each of the bus masters and the number of page hits by each of the bus masters, computes page hit ratios by each of the bus masters, and outputs the page hit ratios. A comparing circuit compares the threshold page hit ratios with the computed page hit ratios obtained from the page hit ratio computing circuit, and outputs predetermined page mode control signals. The page mode control signals control the page modes of the memory by each of the bus masters in response to the comparison result.
机译:在能够选择期望的页面模式以减少存储器访问时间的存储器控​​制装置和用于控制存储器访问的方法中,存储电路接收针对多个总线主控器中的每一个的阈值页面命中率,并存储该阈值页面。命中率。页面命中率计算电路接收每个总线主控器的存储器访问次数和每个总线主控器的页面命中数,计算每个总线主控器的页面命中率,并输出页面命中率。比较电路将阈值页面点击率与从页面点击率计算电路获得的计算的页面点击率进行比较,并输出预定的页面模式控制信号。页面模式控制信号响应于比较结果,通过每个总线主控器来控制存储器的页面模式。

著录项

  • 公开/公告号US7047373B2

    专利类型

  • 公开/公告日2006-05-16

    原文格式PDF

  • 申请/专利权人 YOUNG-SIK KIM;

    申请/专利号US20030639343

  • 发明设计人 YOUNG-SIK KIM;

    申请日2003-08-12

  • 分类号G06F12/00;

  • 国家 US

  • 入库时间 2022-08-21 21:43:12

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