首页> 外国专利> SEMICONDUCTOR DEVICE FOR SIMULTANEOUSLY SUPPRESSING INVERSE NARROW CHANNEL EFFECT AND LEAKAGE CURRENT BETWEEN SOURCE/DRAIN REGIONS AND SUBSTRATE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE FOR SIMULTANEOUSLY SUPPRESSING INVERSE NARROW CHANNEL EFFECT AND LEAKAGE CURRENT BETWEEN SOURCE/DRAIN REGIONS AND SUBSTRATE AND MANUFACTURING METHOD THEREOF

机译:同时抑制源/漏区与基质及其制造方法之间逆向窄通道效应和漏电流的半导体器件

摘要

PURPOSE: A semiconductor device and a manufacturing method thereof are provided to suppress the leakage current between source/drain regions and a substrate and the inverse narrow channel effect at the same time in MISFET(Metal Insulator Semiconductor Field Effect Transistor). CONSTITUTION: A semiconductor device includes an active region(14) including a main surface and a side surface, a trench type element isolation region positioned in contact with the side surface, a gate electrode extending across the main surface in a first direction in parallel with the main surfaces, a channel region placed in the main surface facing the gate electrode, source/drain regions(231,232), a high dopant concentration region(31), and a low dopant concentration region(32). The source/drain regions are placed in the main surface with the channel region between them. The high dopant concentration region is placed in the side surfaces, includes two gate electrode facing parts facing each other in the first direction with the channel region between them. The low dopant concentration region is placed in regions where the high dopant concentration region is not formed and has a concentration lower than that of the high impurity concentration region.
机译:目的:提供一种半导体器件及其制造方法,以在MISFET(金属绝缘体半导体场效应晶体管)中同时抑制源/漏区与衬底之间的泄漏电流和反向窄沟道效应。构成:一种半导体器件,包括:一个有源区(14),包括一个主表面和一个侧面;一个沟槽型元件隔离区,与该侧面接触,栅电极沿第一方向平行于主表面延伸,与主表面,设置在面对栅电极的主表面上的沟道区域,源/漏区域(231,232),高掺杂物浓度区域(31)和低掺杂物浓度区域(32)。源极/漏极区域放置在主表面中,通道区域位于它们之间。高掺杂剂浓度区域被放置在侧面中,包括两个在第一方向上彼此面对并且彼此之间具有沟道区域的面对栅电极的部分。低掺杂剂浓度区域放置在未形成高掺杂剂浓度区域的区域中,并且其浓度低于高杂质浓度区域的浓度。

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