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SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINE BOOSTING SCHEME CAPABLE OF MAXIMIZING BOOSTING LEVEL OF BIT LINE AT LOW VOLTAGE CONDITION
SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINE BOOSTING SCHEME CAPABLE OF MAXIMIZING BOOSTING LEVEL OF BIT LINE AT LOW VOLTAGE CONDITION
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机译:具有在低电压条件下最大化位线升压水平的位线升压方案的半导体存储器
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摘要
Purpose: the semiconductor storage device for having some line boosting scheme is arranged to make to maximize in a boost level of a dotted line of a low voltage condition. Construction: a memory cell array (21) includes some Memory Storage Units (MC0-MCn). One dotted line (BL) is connected to memory cell array. Pressurization capacitor (22,23) is connected to bit line and promotes the one boosting driving signal of a voltage responsive of bit line. It is a little perceived with line sensing amplifier (24) and amplifies a voltage difference between bit line and its complementary bit line (BLB). Pressurization capacitor is made of a depletion type nmos transistor, is had at a negative threshold voltage.
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