首页> 外国专利> SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINE BOOSTING SCHEME CAPABLE OF MAXIMIZING BOOSTING LEVEL OF BIT LINE AT LOW VOLTAGE CONDITION

SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINE BOOSTING SCHEME CAPABLE OF MAXIMIZING BOOSTING LEVEL OF BIT LINE AT LOW VOLTAGE CONDITION

机译:具有在低电压条件下最大化位线升压水平的位线升压方案的半导体存储器

摘要

Purpose: the semiconductor storage device for having some line boosting scheme is arranged to make to maximize in a boost level of a dotted line of a low voltage condition. Construction: a memory cell array (21) includes some Memory Storage Units (MC0-MCn). One dotted line (BL) is connected to memory cell array. Pressurization capacitor (22,23) is connected to bit line and promotes the one boosting driving signal of a voltage responsive of bit line. It is a little perceived with line sensing amplifier (24) and amplifies a voltage difference between bit line and its complementary bit line (BLB). Pressurization capacitor is made of a depletion type nmos transistor, is had at a negative threshold voltage.
机译:目的:具有某种线升压方案的半导体存储器件被布置成使低压条件下的虚线的升压电平最大化。结构:存储器单元阵列(21)包括一些存储器存储单元(MC0-MCn)。一条虚线(BL)连接到存储单元阵列。加压电容器(22,23)连接到位线,并响应于位线来提升一个升压驱动信号。线感测放大器(24)有点让人感觉到它,并且放大了位线与其互补位线(BLB)之间的电压差。加压电容器由耗尽型nmos晶体管制成,具有负阈值电压。

著录项

  • 公开/公告号KR20040064072A

    专利类型

  • 公开/公告日2004-07-16

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20030001345

  • 发明设计人 LEE SEUNG HUN;

    申请日2003-01-09

  • 分类号G11C7/12;

  • 国家 KR

  • 入库时间 2022-08-21 22:48:27

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