首页> 外国专利> SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING REDUCED SIZE AND MANUFACTURING METHOD THEREOF, IMPROVING RECLAMATION CHARACTERISTIC AMONG PLURAL COLUMNAR MISFETS

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING REDUCED SIZE AND MANUFACTURING METHOD THEREOF, IMPROVING RECLAMATION CHARACTERISTIC AMONG PLURAL COLUMNAR MISFETS

机译:具有减小的尺寸的半导体集成电路装置及其制造方法,改善了多柱错器的再填充特性

摘要

PURPOSE: A semiconductor integrated circuit device and a manufacturing method thereof are provided to improve a characteristic of an insulating film as well as to reduce a size of the semiconductor integrated circuit device. CONSTITUTION: A semiconductor integrated circuit device includes a plurality of columnar MISFETs(Metal Insulator Semiconductor Field Effect Transistors)(P1,P2) having first and second semiconductor regions on upper and lower portions, respectively, and a plurality of vertical MISFETs. The vertically MISFET includes a conductive film formed adjacent to a first insulating film(70a) on a sidewall of a columnar laminate. The columnar laminate and the conductive film are spaced by a first distance in a first direction, and further spaced by a second distance, which is greater than the first distance, in a second direction. A second insulating film(70b) is formed in a space between the columnar laminates in the first direction up to at least a predetermined height of the columnar laminate. A second insulating film and a third insulating film are formed in a space between the columnar laminates in the second direction.
机译:目的:提供一种半导体集成电路器件及其制造方法,以改善绝缘膜的特性以及减小半导体集成电路器件的尺寸。构成:一种半导体集成电路器件,包括多个柱状MISFET(金属绝缘体半导体场效应晶体管)(P1,P2),分别在上部和下部分别具有第一和第二半导体区域,以及多个垂直MISFET。垂直MISFET包括在柱状层压体的侧壁上与第一绝缘膜(70a)相邻形成的导电膜。柱状层压体和导电膜在第一方向上间隔开第一距离,并且在第二方向上间隔开大于第一距离的第二距离。在第一方向上的柱状层压体之间的空间中形成第二绝缘膜(70b),直至至少柱状层压体的预定高度。在第二方向上的柱状层叠体之间的空间中形成第二绝缘膜和第三绝缘膜。

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