首页> 外国专利> PASSIVATION LAYER OF SEMICONDUCTOR DEVICE FOR PREVENTING DETERIORATION BY INSERTING METAL BUFFER LAYER BETWEEN OXIDE LAYER AND NITRIDE LAYER AND FORMING METHOD THEREOF

PASSIVATION LAYER OF SEMICONDUCTOR DEVICE FOR PREVENTING DETERIORATION BY INSERTING METAL BUFFER LAYER BETWEEN OXIDE LAYER AND NITRIDE LAYER AND FORMING METHOD THEREOF

机译:通过在氧化层和氮化层之间插入金属缓冲层来防止变质的半导体器件的钝化层及其形成方法

摘要

PURPOSE: A passivation layer of a semiconductor device and a forming method thereof are provided to prevent deterioration of a ferroelectric memory capacitor under a metal buffer layer by inserting the metal buffer layer between a lower insulating passivation layer and an upper insulating passivation layer. CONSTITUTION: A lower structure(102) including a transistor and a metal line is formed on an upper surface of a semiconductor substrate(100). A lower insulating passivation layer(104) is formed on the lower structure. A metal buffer layer(106) is formed on the lower insulating layer. An upper passivation layer(108) is formed on the metal buffer layer. The lower structure is formed with a FRAM. The lower insulating passivation layer is formed with a PE-TEOS layer or a PE-oxide layer.
机译:目的:提供一种半导体器件的钝化层及其形成方法,以通过在下部绝缘钝化层和上部绝缘钝化层之间插入金属缓冲层来防止金属缓冲层下方的铁电存储电容器的劣化。构成:包括晶体管和金属线的下部结构(102)形成在半导体衬底(100)的上表面上。在下部结构上形成下部绝缘钝化层(104)。在下部绝缘层上形成金属缓冲层(106)。上钝化层(108)形成在金属缓冲层上。下部结构形成有FRAM。下部绝缘钝化层形成有PE-TEOS层或PE-氧化物层。

著录项

  • 公开/公告号KR100450664B1

    专利类型

  • 公开/公告日2004-09-20

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR19980001196

  • 发明设计人 KIM GI NAM;HWANG YU SANG;

    申请日1998-01-16

  • 分类号H01L21/30;

  • 国家 KR

  • 入库时间 2022-08-21 22:46:35

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