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BGA PACKAGE USING PATTERNED LEADFRAME TO REDUCE FABRICATING COST AS COMPARED WITH BGA PACKAGE USING SUBSTRATE HAVING STACKED MULTILAYERED INTERCONNECTION PATTERN LAYER
BGA PACKAGE USING PATTERNED LEADFRAME TO REDUCE FABRICATING COST AS COMPARED WITH BGA PACKAGE USING SUBSTRATE HAVING STACKED MULTILAYERED INTERCONNECTION PATTERN LAYER
PURPOSE: A BGA(ball grid array) package using a patterned leadframe is provided to reduce fabricating cost as compared with a BGA package using a substrate having a stacked multilayered interconnection pattern layer by embodying a BGA package while using a patterned leadframe. CONSTITUTION: A plurality of bonding pads(38) are formed on the upper surface of a semiconductor chip(30). A plurality of interconnection patterns(25) are attached to the lower surface of the semiconductor chip, electrically connected to the bonding pads, respectively. A dam prevents molding resin from penetrating the lower part of the semiconductor chip in a molding process, formed on the interconnection pattern along the edge of the lower surface of the semiconductor chip attached to the interconnection pattern. An electrical connection part including the semiconductor chip and the interconnection pattern is encapsulated in a package body wherein the lower surface of the interconnection pattern is exposed to the outside. A plurality of solder balls are respectively attached to the lower part of the interconnection pattern exposed to the lower surface of the package body.
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