Integrated memory chip test system and process for these has self test circuit and records and stores error data from tested cells

摘要

A memory chip (2) comprises a memory (5) and a self-test circuit (21) which uses test data and addresses to test the memory regions and generate error data. A test circuit (7) records error data from cells (3) connected to test and stores this in the memory unit according to their addresses. Independent claims are also included for the following: (a) a test system for the above;and (b) a test process