DELAY FIXED LOOP, AND CLOCK DELAY FIXATION METHOD FOR DELAY FIXED LOOP

摘要

PPROBLEM TO BE SOLVED: To provide a delay fixed loop capable of rapidly fixing a phase without increasing a layout size, and a clock delay fixing method for the delay fixed loop. PSOLUTION: The delay fixed loop used in a synchronous memory device comprises a phase comparison part for comparing the phase of a feedback clock outputted in the same delay condition as a route for passing a clock with that of a reference clock in which an external clock is buffered; a delay control part for outputting a control signal for shifting an internal clock outputted by buffering the external clock according to a comparison signal outputted from the phase comparison part; and a delay line part for shifting and outputting the internal clock according to the control signal. The delay line part has unit delay cells with different resolutions. PCOPYRIGHT: (C)2005,JPO&NCIPI